1. Field of the Invention
This invention relates to a semiconductor device having a circuit comprising thin film transistors (hereinafter referred to as xe2x80x9cTFTsxe2x80x9d) on a substrate having an insulation surface, and to a fabrication method of such a semiconductor device. More specifically, the present invention relates to electro-optical apparatuses (called also xe2x80x9celectronic appliancesxe2x80x9d) typified by a liquid crystal display device including a pixel unit (pixel matrix circuit) and driving circuits (driver circuits) disposed around the pixel unit and formed on the same substrate and an EL (Electro-Luminescence) display device, and electrical appliances (called also xe2x80x9celectronic appliancesxe2x80x9d) having the electro-optical apparatus mounted thereto.
The term xe2x80x9csemiconductor devicexe2x80x9d used in this specification represents generally those apparatuses which function by utilizing semiconductor characteristics, and includes also the electro-optical apparatuses and electrical appliances using the electro-optical apparatus described above.
2. Description of the Related Art
Development of a semiconductor device having a large area integrated circuit, that comprises TFTs formed on a substrate having an insulation surface, has been made progressively. An active matrix type liquid crystal display device, an EL display device and a close adhesion type image sensor are typical of such semiconductor devices. Particularly because TFTs using a polycrystalline silicon film (typically, a poly-Si film) as an active layer (the TFT will be hereinafter referred to as xe2x80x9cpoly-silicon TFTxe2x80x9d) have high field mobility, they can form a variety of functional circuits.
In the active matrix type liquid crystal display device, for example, an integrated circuit that includes a pixel unit for displaying images for each functional block, a shift register circuit, a level shifter circuit, a buffer circuit, a sampling circuit, and so forth, each being based on a CMOS circuit, is formed on one substrate. In the case of the close adhesion type image sensor, an integrated circuit such as a sample-and-hold circuit, a shift register circuit, a multiplexer circuit, and so forth, is formed by using the TFTs.
These driving circuits (which are also called xe2x80x9cperipheral driving circuitsxe2x80x9d) do not always have the same operating condition. Therefore, the characteristics required for the TFTs are naturally different to certain extents. The pixel unit comprises a pixel TFT functioning as a switching device and an auxiliary holding capacitance, and a voltage is applied to a liquid crystal to drive it. Here, an alternating current must be applied to drive the liquid crystal, and a system called xe2x80x9cframe inversion drivingxe2x80x9d has gained a wide application. Therefore, one of the required characteristics of the TFT is that an OFF current value (a drain current value flowing through the TFT when it is in the OFF operation) must be sufficiently lowered. Because a high driving voltage is applied to the buffer circuit, the TFT must have a high withstand voltage such that it does not undergo breakdown even when a high voltage is applied. In order to improve the current driving capacity, it is necessary to sufficiently secure the ON current value (the drain current value flowing through the TFT when it is in the ON operation).
However, the poly-silicon TFT involves the problem that its OFF current is likely to become high. Degradation such as the drop of the ON current value is observed in the poly-silicon TFT in the same way as in MOS transistors used for ICs, or the like. It is believed that the main cause is hot carrier injection, and the hot carriers generated by a high field in the proximity of the drain presumably invite this degradation.
An LDD (Lightly Doped Drain) structure is known as a structure of the TFT for lowering the OFF current value. This structure forms an impurity region having a low concentration between a channel formation region and a source or drain region to which an impurity is doped in a high concentration. The low concentration impurity region is called the xe2x80x9cLDD regionxe2x80x9d.
A so-called xe2x80x9cGOLD (Gate-drain Overlapped LDD) structurexe2x80x9d is also known as a structure for preventing deterioration of the ON current value by hot carrier injection. Since the LDD region is so arranged as to overlap with a gate wiring through a gate insulation film in this structure, this structure is effective for preventing hot carrier injection in the proximity of the drain and for improving reliability. For example, Mutsuko Hatano, Hajime Akimoto and Takeshi Sakai, xe2x80x9cIEDM97 Technical Digestxe2x80x9d, pp. 523-526, 1997, discloses a GOLD structure using side walls formed from silicon. It has been confirmed that this structure provides by far higher reliability than the TFTs having other structures.
In an active matrix type liquid crystal display device, a TFT is disposed for each of dozens to millions of pixels and a pixel electrode is disposed for each TFT. An opposing electrode is provided on an opposing substrate side sandwiching a liquid crystal, and forms a kind of capacitors using the liquid crystal as a dielectric. The voltage to be applied to each pixel is controlled by the switching function of the TFT. As the charge to this capacitor is controlled, the liquid crystal is driven, and an image is displayed by controlling the quantity of transmitting rays of light.
However, the accumulated capacity of this capacitor decreases gradually due to a leakage current resulting from the OFF current, or the like. Consequently, the quantity of transmitting rays of light changes, thereby lowering the contrast of image display. Therefore, it has been customary to dispose a capacitance wiring, and to arrange another capacitor (called a xe2x80x9cholding capacitancexe2x80x9d) in parallel with the capacitor using the liquid crystal as the dielectric in order to supplement the capacitance lost by the capacitor using the liquid crystal as the dielectric.
Nonetheless, the required characteristics of the pixel TFT of the pixel unit are not always the same as the required characteristics of the TFT (herein after called the xe2x80x9cdriving TFTxe2x80x9d) of a logic circuit (called also the xe2x80x9cdriving circuitxe2x80x9d) such as the shift register circuit and the buffer circuit. For example, a large reverse bias voltage (a negative voltage in n-channel TFT) is applied to the gate wiring in the pixel TFT, but the TFT of the driving circuit is not fundamentally driven by the application of the reverse bias voltage. The operation speed of the former may be lower than {fraction (1/100)} of the latter. The GOLD structure has a high effect for preventing the degradation of the ON current value, it is true, but is not free from the problem that the OFF current value becomes greater than the ordinary LDD structures. Therefore, the GOLD structure cannot be said as an entirely preferable structure for the pixel TFT, in particular. On the contrary, the ordinary LDD structures have a high effect for restricting the OFF current value, but is not resistant to hot carrier injection, as is well known in the art.
For these reasons, it is not always preferred to constitute all the TFTs by the same construction in the semiconductor devices having a plurality of integrated circuits such as the active matrix type liquid crystal display device.
When a sufficient capacitance is secured by forming a holding capacitance using the capacitance wiring in the pixel unit as represented by the prior art example described above, an aperture ratio (a ratio of an area capable of image display to an area of one pixel) must be sacrificed. Particularly in the case of a small high precision panel used for a projector type display device, the area per pixel is so small that the drop of the aperture ratio by the capacitance wiring becomes a serious problem.
In order to solve the problems described above, the present invention aims at improving operation performance and reliability of a semiconductor device by optimizing the structures of the TFT used for each circuit of the semiconductor device in accordance with the function of each circuit.
It is another object of the present invention to provide a structure for lowering the area of a holding capacitance provided to each pixel and for improving an aperture ratio in a semiconductor device having a pixel unit.
To accomplish the objects described above, the present invention employs the following constructions. In a semiconductor device including a pixel unit and a driving circuit on the same substrate, the present invention provides a semiconductor device wherein an LDD region of an n-channel TFT forming the driving circuit described above is formed in such a fashion that a part or the whole part thereof overlaps with a gate wiring of the n-channel TFT while sandwiching a gate insulation film between them, and an LDD region of a pixel TFT that forms the pixel unit is formed in such a fashion as not to overlap with a gate wiring of the pixel TFT while sandwiching a gate insulation film.
In addition to the construction described above, the holding capacitance of the pixel unit may comprise a shading film arranged on a resin film, an oxide of the shading film and a pixel electrode. According to this arrangement, the holding capacitance can be formed with an extremely small area and consequently, the aperture ratio of the pixel can be improved.
Another detailed construction according to the present invention is as follows. In a semiconductor device including a pixel unit and a driving circuit on the same substrate, this driving circuit includes a first n-channel TFT formed in such a fashion that the whole part of its LDD region overlaps with a gate wiring while sandwiching a gate insulation film between them, and a second n-channel TFT formed in such a fashion that a part of its LDD region overlaps with a gate wiring while sandwiching a gate insulation film between them, and the pixel unit includes a pixel TFT formed in such a fashion that an LDD region does not overlap with a gate wiring while sandwiching a gate insulation film between them. Needless to say, a holding capacitance of the pixel unit may comprise a shading film disposed on an organic resin film, an oxide of the shading film and a pixel electrode.
In the construction described above, the LDD region of the n-channel TFT forming the driving circuit may contain an element belonging to the Group 15 of the Periodic Table in a concentration higher by 2 to 10 times that of the LDD region of the pixel TFT. The LDD region of the first n-channel TFT may be formed between a channel formation region and a drain region, and the LDD regions of the second n-channel TFT may be so formed as to sandwich the channel formation region between them.
As to a method of fabricating a semiconductor device, the present invention employs the following construction. In a method of fabricating a semiconductor device including a pixel unit and a driving circuit on the same substrate, the method according to the present invention comprises the steps of forming a channel formation region, a source region, a drain region and an LDD region between the drain region and the channel formation region, in an active layer of a first n-channel TFT that forms the driving circuit; forming a channel formation region, a source region, a drain region, an LDD region between the source region and the channel formation region and an LDD region between the drain region and the channel formation region, in an active layer of a second n-channel TFT that forms the driving circuit; forming a channel formation region, a source region and a drain region in an active layer of a p-channel TFT that forms the driving circuit; and forming a channel formation region, a source region, a drain region and an LDD region between the drain region and the channel formation region, in an active layer of a pixel TFT that forms the pixel unit; wherein the LDD region of the first n-channel TFT is formed in such a fashion that the whole part thereof overlaps with the gate wiring of the first n-channel TFT while sandwiching the gate insulation film between them, the LDD region of the second n-channel TFT is formed in such a fashion that a part thereof overlaps with the gate wiring of the first n-channel TFT while sandwiching the gate insulation film between them, and the LDD region of the pixel TFT is so arranged as not to overlap with the gate wiring of the pixel TFT while sandwiching the gate insulation film between them.
As to the fabrication method, the present invention employs the following another construction. In a method of fabricating a semiconductor device including a pixel unit and a driving circuit on the same substrate, the method of the present invention comprises a first step of forming an active layer on a substrate; a second step of forming a gate insulation film in contact with the active layer; a third step of adding an element belonging to the Group 15 of the Periodic Table to an active layer of an n-channel TFT forming the driving circuit, and forming an nxe2x88x92 region; a fourth step of forming a conductive film on the gate insulation film; a fifth step of patterning the conductive film and forming a gate wiring of a p-channel TFT; a sixth step of adding an element belonging to the Group 13 of the Periodic Table in self-alignment to the active layer of the p-channel TFT with the gate wiring of the p-channel TFT as a mask, and forming a p++ region; a seventh step of patterning the conductive film that is not patterned in the fifth step, and forming agate wiring of then-channel TFT; an eighth step of adding an element belonging to the Group 15 of the Periodic Table to the active layer of the n-channel TFT, and forming an n+ region; and a ninth step of adding an element belonging to the Group 15 of the Periodic Table in self-alignment with the gate wirings of the n-channel TFT and the p-channel TFT as the masks, and forming an nxe2x88x92xe2x88x92 region.
In a method of fabricating a semiconductor device including a pixel unit and a driving circuit on the same substrate, a further detailed construction of the method of the present invention comprises a first step of a first step of forming an active layer on a substrate; a second step of forming a gate insulation film in contact with the active layer; a third step of adding an element belonging to the Group 15 of the Periodic Table to an active layer of an n-channel TFT forming the driving circuit, and forming an nxe2x88x92 region; a fourth step of forming a conductive film on the gate insulation film; a fifth step of patterning the conductive film and forming a gate wiring of a p-channel TFT; a sixth step of adding an element belonging to the Group 13 of the Periodic Table in self-alignment to the active layer of the p-channel TFT with the gate wiring of the p-channel TFT as a mask, and forming a p++ region; a seventh step of patterning the conductive film, that is not patterned in the fifth step, and forming a gate wiring of the n-channel TFT; an eighth step of adding an element belonging to the Group 15 of the Periodic Table to the active layer of the n-channel TFT, and forming an n+ region; and a ninth step of adding an element belonging to the Group 15 of the Periodic Table in self-alignment with the gate wirings of the n-channel TFT and the p-channel TFT as the masks, and forming an nxe2x88x92xe2x88x92 region.
In the construction described above, the sequence of the process steps for forming the p++ region, the n+ region or the nxe2x88x92xe2x88x92 region may be changed appropriately. Whichever sequence may be employed, the basic function of the TFT formed finally does not change and the effects of the present invention are not spoiled in any way.